Difference between revisions of "Tutorials"

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== IEEE International Conference on Computer Design (ICCD), 2015 ==
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== 2018 ==
=== October 18-21, New York City, New York, USA===
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=== IEEE International Green and Sustainable Computing Conference (IGSC) ===
'''''Sigil and SynchroTrace: Communication-Aware Workload Profiling and Memory-NoC Simulation''''' (w/ Prof. Mark Hempstead, Tufts University)
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'''October 22-24, Pittsburgh, Pennsylvania, USA'''
  
'''Coming Soon...'''
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'''''Energy-Efficient and Secure Computing Systems ''''' (w/ Prof. Emre Salman, Stony Brook University)
  
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== 2016 ==
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=== IEEE International Symposium on Workload Characterization (IISWC) ===
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'''September 25-27, Providence, Rhode Island, USA'''
  
== International Symposium on Workload Characterization (IISWC), 2015 ==
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[http://vlsi.ece.drexel.edu/index.php?title=Tutorials%3ASynchroTrace_Sigil_IISWC_2016 '''''Sigil2 and SynchroTrace: Flexible Workload Profiling and Fast Memory-NoC Simulation '''''] (w/ Prof. Mark Hempstead, Tufts University)
=== October 4-6, Atlanta, Georgia, USA ===
 
  
'''''Sigil and SynchroTrace: Communication-Aware Workload Profiling and Memory-NoC Simulation''''' (w/ Prof. Mark Hempstead, Tufts University)
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== 2015 ==
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=== IEEE International Conference on Computer Design (ICCD) ===
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'''October 18-21, New York City, New York, USA'''
  
'''Topic Outline'''  
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[http://vlsi.ece.drexel.edu/index.php?title=Tutorials%3ASynchroTrace_Sigil_ICCD_2015 '''''Sigil and SynchroTrace: Communication-Aware Workload Profiling and Memory-NoC Simulation'''''] (w/ Prof. Mark Hempstead, Tufts University)
  
Trace capture & analysis for multi-threaded programs, large design space exploration, and insights from workload profiling (e.g. accelerator design via hw/sw co-design and related architectural decisions).
 
  
'''Synopsis'''
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=== IEEE International Symposium on Workload Characterization (IISWC) ===
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'''October 4-6, Atlanta, Georgia, USA'''
  
The [[SynchroTrace]] simulation framework enables exploration of a large design space. It has demonstrated speed and accuracy in aiding uncore designers for cache and network-on-chip design decisions, and is currently being integrated into Gem5 as an official patch.
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[http://vlsi.ece.drexel.edu/index.php?title=Tutorials%3ASynchroTrace_Sigil_IISWC_2015 '''''Sigil and SynchroTrace: Communication-Aware Workload Profiling and Memory-NoC Simulation''''']  (w/ Prof. Mark Hempstead, Tufts University)
  
[http://dpac.ece.drexel.edu/current-research-projects/sigil/ Sigil] is our workload profiling toolset that has enabled SynchroTrace. It captures and classifies a workload's computation and communication operations, and intercepts synchronization actions within threads. Sigil has been used for accelerator co-design research by gathering communication edges between functions/threads to provide insight to the ''true'' cost of a workload.  Additionally, its unique ability to create non-deterministic traces in a multithreaded trace is utilized for truly architecture-agnostic simulations.
 
  
'''Agenda'''
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=== IEEE International Symposium on Circuits and Systems (ISCAS) ===
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'''May 24-27, Lisbon, Portugal'''
  
In this talk we discuss the utility and impact of SynchroTrace and Sigil, and show examples downloading, building, and running the tools, along with analysis of the data produced.
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'''''Low Voltage Power Delivery and Clocking in Nanoscale Technologies: Basics to Recent Advances''''' (w/ Prof. Emre Salman, Stony Brook University)
  
  
== IEEE International Symposium on Circuits and Systems (ISCAS), 2015 ==
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== 2012 ==
=== May 24-27, Lisbon, Portugal ===
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=== ACM/IEEE International Conference on Computer-Aided Design (ICCAD) ===
'''''Low Voltage Power Delivery and Clocking in Nanoscale Technologies: Basics to Recent Advances''''' (w/ Prof. Emre Salman, Stony Brook University)
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'''November 5-8, San Jose, California, USA'''
 
 
  
== ACM/IEEE International Conference on Computer-Aided Design (ICCAD), 2012 ==
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'''''High Performance, Low Power Resonant Clocking''''' (w/ Prof. Matthew Guthaus, UCSC)

Latest revision as of 09:20, 12 August 2019

2018

IEEE International Green and Sustainable Computing Conference (IGSC)

October 22-24, Pittsburgh, Pennsylvania, USA

Energy-Efficient and Secure Computing Systems (w/ Prof. Emre Salman, Stony Brook University)

2016

IEEE International Symposium on Workload Characterization (IISWC)

September 25-27, Providence, Rhode Island, USA

Sigil2 and SynchroTrace: Flexible Workload Profiling and Fast Memory-NoC Simulation (w/ Prof. Mark Hempstead, Tufts University)

2015

IEEE International Conference on Computer Design (ICCD)

October 18-21, New York City, New York, USA

Sigil and SynchroTrace: Communication-Aware Workload Profiling and Memory-NoC Simulation (w/ Prof. Mark Hempstead, Tufts University)


IEEE International Symposium on Workload Characterization (IISWC)

October 4-6, Atlanta, Georgia, USA

Sigil and SynchroTrace: Communication-Aware Workload Profiling and Memory-NoC Simulation (w/ Prof. Mark Hempstead, Tufts University)


IEEE International Symposium on Circuits and Systems (ISCAS)

May 24-27, Lisbon, Portugal

Low Voltage Power Delivery and Clocking in Nanoscale Technologies: Basics to Recent Advances (w/ Prof. Emre Salman, Stony Brook University)


2012

ACM/IEEE International Conference on Computer-Aided Design (ICCAD)

November 5-8, San Jose, California, USA

High Performance, Low Power Resonant Clocking (w/ Prof. Matthew Guthaus, UCSC)