Difference between revisions of "Ragh Kuttappa"

From VLSILab
Jump to: navigation, search
(Conferences)
(Contact Information)
Line 57: Line 57:
  
 
'''Office:''' Bossone 405 <br>
 
'''Office:''' Bossone 405 <br>
'''Email:'''  ragh [at the rate] drexel [period] edu <br>
+
'''Email:'''  fr67 [at the rate] drexel [period] edu <br>
 
'''Linkedin:''' [https://www.linkedin.com/in/ragh-kuttappa-06b4745b/ ragh/linkedin] <br>
 
'''Linkedin:''' [https://www.linkedin.com/in/ragh-kuttappa-06b4745b/ ragh/linkedin] <br>

Revision as of 11:19, 14 May 2019

Ragh Kuttappa

Education

Ph.D. in Electrical Engineering, ongoing

Drexel University, Philadelphia, PA, USA

M.S. in Electrical Engineering, 2015

San Francisco State University

Bachelor of Engineering, 2012

Visvesvaraya Technological University (VTU), Karnataka, India

Research Interests

  • Resonant clocking technologies
  • Adiabatic circuits
  • Nanoscale circuits and systems
  • Low-power design methodologies

Resonant clocking technologies
Resonant clocking is a low power clock generation and distribution solution for modern ICs. The main research focus is the design and implementation of rotary clocks that is interoperable within the traditional ASIC flow. Based on years of development and experience within Dr. Taskin's research group numerous products for rotary clocks are currently being developed to address future needs for energy efficient computing.

1. RotaSYN: Rotary Traveling Wave Oscillator SYNthesizer

RotaSYN is a backend synthesis tool for rotary clocks. RotaSYN is demonstrated on publicly available designs and compared to traditionally clocked designs. Check out our RotaSYN PAPER published in TCAS-I.


  • RotaSYN Flow
  • AES core synthesized with RotaSYN

Résumé

Ragh Kuttappa (April 2018)

Publications

Journals

  1. Ragh Kuttappa, Adarsha Balaji, Vasil Pano, Baris Taskin, and Hamid Mahmoodi, "RotaSYN: Rotary Traveling Wave Oscillator SYNthesizer", IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I), February 2019 PAPER.
  2. Ragh Kuttappa, Houman Homayoun, Hassan Salmani and Hamid Mahmoodi, "Reliability Analysis of Spin Transfer Torque based Look up Tables under Process Variations and NBTI Aging," Elsevier Microelectronics Reliability Journal, Vol. 62, pp. 156--166, July 2016.

Conferences

  1. Ragh Kuttappa, Baris Taskin, Scott Lerner, Vasil Pano, and Ioannis Savidis, "Robust Low Power Clock Synchronization for Multi-Die Systems", Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), July 2019.
  2. Longfei Wang, Ragh Kuttappa, Baris Taskin, and Selcuk Kose, "Distributed Digital Low-Dropout Regulators with Phase Interleaving for On-Chip Voltage Noise Mitigation", Proceedings of the IEEE International Workshop on System Level Interconnect Prediction (SLIP), June 2019.
  3. Ragh Kuttappa, Scott Lerner, Leo Filippini, and Baris Taskin, "Low Swing -- Low Frequency Rotary Traveling Wave Oscillators", Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2019.
  4. Ragh Kuttappa and Baris Taskin, "Low Frequency Rotary Traveling Wave Oscillators", Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2018.
  5. Ragh Kuttappa, Leo Filippini, Scott Lerner and Baris Taskin, "Stability of Rotary Traveling Wave Oscillators Under Process Variations and NBTI", Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2017, pp. 1--4.
  6. Ragh Kuttappa, Lunal Khuon, Bahram Nabet and Baris Taskin, "Reconfigurable Threshold Logic Gates using Optoelectronic Capacitors", Proceedings of the Design, Automation and Test in Europe (DATE), March 2017, pp. 614--617.
  7. Ragh Kuttappa, Houman Homayoun, Hassan Salmani and Hamid Mahmoodi, "Comparative Analysis of Robustness of Spin Transfer Torque based Look Up Tables under Process Variations,” Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), May 2016, pp. 606--609.

Contact Information

Address:
3141 Chestnut Street
Drexel University
ECE Department
Philadelphia, PA 19104

Office: Bossone 405
Email: fr67 [at the rate] drexel [period] edu
Linkedin: ragh/linkedin