Difference between revisions of "Main Page"

From VLSILab
Jump to: navigation, search
Line 32: Line 32:
  
 
== [[People]] ==
 
== [[People]] ==
 +
 +
[[Leo Filippini]]
 +
 +
[[Scott Lerner]]
 +
 +
[[Michael Lui]]
 +
 +
[[Vasil Pano]]
 +
 +
[[Karthik Sangaiah]]
 +
 +
[[Can Sitik]]
  
 
== [[Research]] ==
 
== [[Research]] ==
 +
[[Research#CMP-NoC Co-design|CMP-NoC Co-design]]
 +
 +
[[Research#Embedded System Co-design|Embedded System Co-design]]
 +
 +
[[Research#Design and Automation of Low Swing Clocking|Design and Automation of Low Swing Clocking]]
 +
 +
[[Research#Wireless On-Chip Interconnects|Wireless On-Chip Interconnects]]
 +
 +
[[Research#Clock Tree/Mesh Synthesis|Clock Tree/Mesh Synthesis]]
 +
 +
[[Research#Ultra Low-Power Adiabatic Circuit Design|Ultra Low-Power Adiabatic Circuit Design]]
  
 
== [[Publications]] ==
 
== [[Publications]] ==

Revision as of 12:11, 17 March 2015

Drexel VLSI Laboratory (http://vlsi.ece.drexel.edu)

Drex-Logo-small.gif

Drexel University

Department of Electrical and Computer Engineering

3141 Chestnut Street (map)

324 Bossone Research Center

Philadelphia, PA 19104


People

Leo Filippini

Scott Lerner

Michael Lui

Vasil Pano

Karthik Sangaiah

Can Sitik

Research

CMP-NoC Co-design

Embedded System Co-design

Design and Automation of Low Swing Clocking

Wireless On-Chip Interconnects

Clock Tree/Mesh Synthesis

Ultra Low-Power Adiabatic Circuit Design

Publications

Teaching

News/Events