Difference between revisions of "Can Sitik"

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==Research Interests==
 
==Research Interests==
 +
* High-Performance/Low-Power Clock Networks
 +
* Low Swing Clock Trees
 +
* Clock Mesh Synthesis, [http://www.design-reuse.com/articles/21019/clock-mesh-benefits-analysis.html clock mesh benefits]
 
* Electronic Design Automation(EDA) for VLSI, [http://en.wikipedia.org/wiki/Electronic_design_automation what is EDA?]
 
* Electronic Design Automation(EDA) for VLSI, [http://en.wikipedia.org/wiki/Electronic_design_automation what is EDA?]
 
* Physical Design of System-on-Chips
 
* Physical Design of System-on-Chips
* High-Performance/Low-Power Clocking
 
* Clock Tree/Mesh Synthesis, [http://www.design-reuse.com/articles/21019/clock-mesh-benefits-analysis.html clock mesh benefits]
 
  
 
==Teaching==
 
==Teaching==

Revision as of 19:44, 9 February 2013

Can Sitik

Education

Ph.D. in Computer Engineering, 2011 - Present

Drexel University, Philadelphia, Pennsylvania, USA

B.S. in Electrical and Electronics Engineering, 2011

Middle East Technical University(METU), Ankara, Turkey

Research Interests

  • High-Performance/Low-Power Clock Networks
  • Low Swing Clock Trees
  • Clock Mesh Synthesis, clock mesh benefits
  • Electronic Design Automation(EDA) for VLSI, what is EDA?
  • Physical Design of System-on-Chips

Teaching

  • ECE-C304: Design with Microcontrollers (Winter 2012-13, Summer 2012)
  • ENGR-231: Linear Engineering Systems (Spring, Fall 2012)
  • ECE-E421: Advanced Electronics I (Fall 2011)
Please refer to my Weekly Schedule to ask for an appointment

Contact Information

Address:
3141 Chestnut Street
Department of ECE
Drexel University
Bossone 324
Philadelphia, PA 19104

Email: as3577@drexel.edu

Linkedin: A. Can Sitik