Difference between revisions of "Tutorials"

From VLSILab
Jump to: navigation, search
Line 8: Line 8:
  
  
=== International Symposium on Workload Characterization (IISWC) ===
+
=== IEEE International Symposium on Workload Characterization (IISWC) ===
 
'''October 4-6, Atlanta, Georgia, USA'''
 
'''October 4-6, Atlanta, Georgia, USA'''
  
Line 32: Line 32:
  
 
'''''Low Voltage Power Delivery and Clocking in Nanoscale Technologies: Basics to Recent Advances''''' (w/ Prof. Emre Salman, Stony Brook University)
 
'''''Low Voltage Power Delivery and Clocking in Nanoscale Technologies: Basics to Recent Advances''''' (w/ Prof. Emre Salman, Stony Brook University)
 +
  
 
== 2012 ==
 
== 2012 ==

Revision as of 14:48, 10 August 2015

2015

IEEE International Conference on Computer Design (ICCD)

October 18-21, New York City, New York, USA

Sigil and SynchroTrace: Communication-Aware Workload Profiling and Memory-NoC Simulation (w/ Prof. Mark Hempstead, Tufts University)

Coming Soon...


IEEE International Symposium on Workload Characterization (IISWC)

October 4-6, Atlanta, Georgia, USA

Sigil and SynchroTrace: Communication-Aware Workload Profiling and Memory-NoC Simulation (w/ Prof. Mark Hempstead, Tufts University)

Topic Outline

Trace capture & analysis for multi-threaded programs, large design space exploration, and insights from workload profiling (e.g. accelerator design via hw/sw co-design and related architectural decisions).

Synopsis

The SynchroTrace simulation framework enables exploration of a large design space. It has demonstrated speed and accuracy in aiding uncore designers for cache and network-on-chip design decisions, and is currently being integrated into Gem5 as an official patch.

Sigil is our workload profiling toolset that has enabled SynchroTrace. It captures and classifies a workload's computation and communication operations, and intercepts synchronization actions within threads. Sigil has been used for accelerator co-design research by gathering communication edges between functions/threads to provide insight to the true cost of a workload. Additionally, its unique ability to create non-deterministic traces in a multithreaded trace is utilized for truly architecture-agnostic simulations.

Agenda

In this talk we discuss the utility and impact of SynchroTrace and Sigil, and show examples downloading, building, and running the tools, along with analysis of the data produced.


IEEE International Symposium on Circuits and Systems (ISCAS)

May 24-27, Lisbon, Portugal

Low Voltage Power Delivery and Clocking in Nanoscale Technologies: Basics to Recent Advances (w/ Prof. Emre Salman, Stony Brook University)


2012

ACM/IEEE International Conference on Computer-Aided Design (ICCAD)

November 5-8, San Jose, California, USA

High Performance, Low Power Resonant Clocking (w/ Prof. Matthew Guthaus, UCSC)