Difference between revisions of "Software"

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== GitHUB page ==
 
== GitHUB page ==
Drexel VANDAL GitHub: git.io/VANDAL
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Drexel VANDAL GitHub: https://github.com/VANDAL
  
  
== SynchroTrace==
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== SynchroTrace ==
 
[https://github.com/VANDAL/SynchroTrace-gem5 git.io/synchrotrace]
 
[https://github.com/VANDAL/SynchroTrace-gem5 git.io/synchrotrace]
  
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For details and download information see: [[SynchroTrace]]
 
For details and download information see: [[SynchroTrace]]
  
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== Prism ==
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[https://github.com/VANDAL/prism]
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Prism is a super-cool™ framework for easily analyzing how an application runs.
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If you want to easily look at memory operations, function traces, IOPs/FLOPs, et al, check out Prism.
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We have used it internally for workload-guided EDA tool flows, on-chip routing, thread-mapping, and in the design of architectural simulators.
  
 
== SLECTS ==
 
== SLECTS ==

Revision as of 13:53, 11 March 2018

GitHUB page

Drexel VANDAL GitHub: https://github.com/VANDAL


SynchroTrace

git.io/synchrotrace

SynchroTrace is a two-step trace-driven simulation methodology that enables efficient design space exploration of computing units (CMPs, MPSoCs, HPC, etc.).

For details and download information see: SynchroTrace

Prism

[1]

Prism is a super-cool™ framework for easily analyzing how an application runs. If you want to easily look at memory operations, function traces, IOPs/FLOPs, et al, check out Prism.

We have used it internally for workload-guided EDA tool flows, on-chip routing, thread-mapping, and in the design of architectural simulators.

SLECTS

Implementing a slew-driven clock tree synthesis methodology.

For details see: SLECTS


Rotary Resonant Clock Synthesizer

A rotary resonant clock synthesizer in Cadence.

For details see: RotaSyn