Difference between revisions of "Main Page"

From VLSILab
Jump to: navigation, search
Line 2: Line 2:
 
== Drexel VLSI and Architecture Laboratory ('''VANDAL''')==
 
== Drexel VLSI and Architecture Laboratory ('''VANDAL''')==
  
[[File:Drex-Logo-small.gif|right|super]]
+
[[File:VANDAL.png|right|super|200px]]
  
 
[http://www.drexel.edu Drexel University]
 
[http://www.drexel.edu Drexel University]

Revision as of 16:14, 14 January 2018

Drexel VLSI and Architecture Laboratory (VANDAL)

VANDAL.png

Drexel University

Department of Electrical and Computer Engineering

3141 Chestnut Street (map)

324 Bossone Research Center

Philadelphia, PA 19104


People

Faculty

Baris Taskin (Biography, CV, Contact)

Ph.D. students

Leo Filippini

Ragh Kuttappa

Scott Lerner

Michael Lui

Vasil Pano

Karthik Sangaiah


Other researchers

See People

Research

Resonant Clocking Technologies

CMP-NoC Co-design

Design and Automation of Low Swing Clocking

Wireless On-Chip Interconnects

Clock Tree/Mesh Synthesis

Ultra Low-Power Adiabatic Circuit Design

Energy Efficient Computing with OptoElectronics

Publications

Software

Drexel VANDAL GitHub: git.io/VANDAL

SynchroTrace

Seminars

Tutorials

Teaching

News/Events